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AMD EPYC 8005 Raises SP6 Core Counts Without Customer Rollout Data

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ServeTheHome reported that AMD EPYC 8005 “Sorano” keeps the SP6 server socket while reaching 84 cores, DDR5-6400 memory and CXL 2.0. The sponsored test material disclosed AMD-supplied CPUs, leaving customer deployments and order evidence outside the public record.

Verified against source materialEdited by SendTech Times Chips & Compute DeskSource: ServeTheHome
AMD EPYC 8005 Raises SP6 Core Counts Without Customer Rollout Data
Image source: ServeTheHome

EPYC 8005 Retains SP6 While Raising The Core Ceiling

According to ServeTheHome, AMD EPYC 8005 “Sorano” retains the SP6 server platform while changing the performance profile of the socket.

The report described the new server CPU line as a drop-in replacement for EPYC 8004 “Siena” where the platform supports the required BIOS update.

ServeTheHome said the series reaches up to 84 cores and 168 threads in the same mid-sized package.

ServeTheHome also lists up to 384MB of L3 cache, DDR5-6400 memory support and CXL 2.0 for the EPYC 8005 platform.

Zen 5 Replaces Zen 4c In The Same Socket

The central hardware change is the move from Zen 4c cores in EPYC 8004 to Zen 5 cores in EPYC 8005, according to ServeTheHome.

The review material says the new line uses the same full-cache Zen 5 cores found in EPYC 4005 and most EPYC 9005 “Turin” parts, rather than keeping a denser-core split for the lower-power SP6 family.

The same SP6 platform is now described around full-cache Zen 5 cores rather than dense Zen 4c cores.

Power And Price Claims Need Deployment Proof

The report comparison material lists a default TDP range that rises by 25W to 225W, or 12.5%.

It also says measured system-level power at 100% utilisation was closer to 30-34W higher, under 10%, while adding cores, newer architecture and faster memory.

ServeTheHome said the SKU stack ranges from 8 to 84 cores, with listed prices from $529 to $5799.

The review presented the listed prices as cost-per-core context and disclosed that AMD sent the CPUs and that the piece was sponsored.

Customers And Ramp Timing Were Not Named

The performance and power figures come from a sponsored test context, not from named customer deployments.

The material discloses platform specifications, socket continuity and benchmark context, while the public record still lacks initial buyers, server-vendor launch dates, order volumes or a production ramp timetable.

The remaining public-record gaps are customer deployments, order volumes, server-vendor launch dates and a production ramp timetable in the published material.

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