Kepler Targets 2027 Production for HBM Replacement Memory

By 2027, Kepler Computing is aiming to move a proposed replacement for high-bandwidth memory into production, EE Times reported, positioning the startup's 3D and ferroelectric memory technology as a way to ease one of the costliest bottlenecks in AI chips.

The plan matters because memory movement has become a limiting factor for AI infrastructure.

GPUs and accelerators can be constrained by the cost, energy use and heat tied to DRAM, HBM and SRAM scaling.

Kepler's approach tries to change the chip-side memory stack rather than simply waiting for smaller transistor nodes or more expensive advanced fabrication.

Kepler has partnered with GlobalFoundries for production and has built its own fab to ramp the proprietary process.

The company argues that a small Kepler fablet placed beside a customer's legacy fab could help move several node generations ahead at about one tenth of the investment required for a new advanced-node facility.

The technical claim rests on monolithic device stacking inside the chip.

Chief executive Debo Olaosebikan told EE Times the company can use older, larger transistors and place new devices above them, reducing dependence on EUV lithography for the memory advance.

A bottom transistor could still be made with EUV, but the architecture does not require customers to shrink that transistor to gain more memory density.

That mechanism points directly at the HBM and SRAM problem.

Kepler chief technology officer Sasi Manipatruni put the memory-density gain at two to three times while remaining compatible with CMOS.

Olaosebikan described the company's two memories as, in practical terms, one HBM replacement and one SRAM replacement.

The SRAM alternative is expected to deliver at least 10 times the capacity available from SRAM, while the HBM alternative is expected to offer five to 10 times more bandwidth per watt than HBM.

Those figures are company claims, not independent benchmark results, but they define the tradeoff Kepler is selling: more memory capacity and bandwidth without forcing every customer onto the most advanced manufacturing node.

Intel Capital managing director Srini Ananth, whose firm has invested in Kepler, framed the design as a way to move beyond two-dimensional scaling constraints and extend high-performance computing architectures through back-end-of-line density gains.

The startup is withholding details of the ferroelectric material.

Manipatruni linked that secrecy to national-security and competitive concerns, saying the company had spent about seven years and thousands of iterations working through the composition, gradients, electrodes and related material choices.

The guarded materials work leaves an important unknown around manufacturability and outside verification.

Packaging is another part of the proposition.

Kepler's HBM replacement will rely on its own 3D packaging technology, and co-founder Rajeev Dokania said the architecture keeps thermal overhead negligible compared with traditional approaches.

Lower thermal overhead is central to the pitch because AI data centres are already under pressure from power draw and heat dissipation.

The manufacturing path is still narrower than a broad commercial rollout.

Kepler says its 2027 production capacity is already allocated, but it declined to name customers or partners beyond GlobalFoundries.

The named customer base is limited to AI data centres and manufacturing, with longer-term plans to develop logic chips after the memory products move toward scale.