Upscale AI Pairs Nvidia Spectrum-X With Its Own SkyHammer Fabric

The Next Platform reported that Upscale AI has paired its planned SkyHammer scale-up fabric with Nvidia's Spectrum-X Ethernet switches, putting the young AI networking company in the unusual position of supplying Nvidia-based scale-out gear while building technology that could compete with Nvidia's NVSwitch domain.

The company is aiming at the fabric layer inside large AI clusters, where accelerators need both scale-up links across a shared memory domain and scale-out networking across racks.

Nvidia's current NVLink and NVSwitch stack can join as many as 72 GPUs in the NVL72 rackscale design, while a multi-tier NVSwitch domain can reach 576 GPUs.

Nvidia has also opened NVLink Fusion so custom CPUs and XPU accelerators can connect into Nvidia's architecture, but customers are not yet being offered a simple path to attach both their own CPUs and their own XPUs around Nvidia switches and protocols.

Upscale AI has become more visible since a January Series A. The source says the company has raised $500 million in total, doubled its valuation to $2 billion, and grown to more than 300 people.

Its executives used a recent webinar to disclose more of the plan for SkyHammer, a scale-up switch ASIC that has been in development for several years, and the surrounding SkyFabriX architecture.

The clearest published specification is aggregate bandwidth.

SkyHammer is listed at 115.2 Tb/sec, putting it in the same broad class as leading scale-out switch ASICs from Cisco, Broadcom and Nvidia.

The architecture is also expected to support switch gear spanning multiple petabits per second of aggregate bandwidth, likely by combining multiple SkyHammer ASICs inside one system rather than relying on a single chip for every configuration.

That topology carries the normal modular-switch tradeoff.

A vendor can double native bandwidth per port by building a small two-tier network from several ASICs, with some chips supplying downlinks and others cross-coupling the group.

The approach can improve per-port bandwidth economics compared with a single larger device, but it can also add latency on some hops.

Upscale AI has not published a future SkyHammer ASIC roadmap, leaving the exact path to higher-bandwidth systems unresolved.

Memory-domain scale is the larger competitive claim.

SkyHammer's architecture can support up to 576 accelerators in one networking tier, with multiple tiers extending that to thousands of accelerators.

The source frames 1,024 and 1,156 devices as likely comparison points: UALink is targeting 1,024 XPUs in a single tier, while Nvidia is expected to push NVSwitch beyond 576 GPUs toward 1,152 GPUs in the Rubin Ultra generation through a multi-tier network.

Bandwidth per device is less flattering in that comparison.

At 576 devices, SkyHammer works out to 200 Gb/sec per device.

With 72 XPUs, the article calculates 1.6 Tb/sec per port, equal to about 200 GB/sec over the scale-up network.

That is materially below the 1.8 TB/sec associated with NVSwitch 5 and NVLink 5 on Grace-Blackwell NVL72 systems, and below the 3.6 TB/sec planned for NVSwitch 6 and NVLink 6 with Vera-Rubin NVL72 systems.

Upscale AI is arguing that latency behavior, not just raw bandwidth, will determine where its fabric fits.

Arvind Srikumar, the company's senior vice president of product and marketing, told The Next Platform that token generation makes predictable latency a central metric.

He said the ASIC is built for predictable jitter, link-level reliability and a fabric mechanism intended to keep the domain lossless, while also arguing that SkyFabriX started from a clean-sheet design rather than an Ethernet fabric retrofitted for scale-up protocols.

The implementation still matters because SkyHammer is running UALink over Ethernet, often shortened to UALoE, and ESUN memory protocols rather than native UALink.

That makes the chip an Ethernet switch ASIC under the covers.

The article treats that as a constraint because a native UALink design with more radix might have represented a cleaner alternative, but it also puts SkyHammer in the same standards contest now forming around fast Ethernet switches adapted for scale-up AI work.

The Nvidia relationship sits on the other side of the cluster.

Upscale AI has chosen Nvidia's Spectrum-X Ethernet ASICs as its preferred scale-out fabric supplier, not Nvidia's Quantum-X InfiniBand line.

The plan is to buy Spectrum-X ASICs, build its own scale-out switches from them, and port SkyOS so the operating system runs on both SkyFabriX scale-up switches and Spectrum-X scale-out switches.

Those Spectrum-X systems are expected to support 400 Gb/sec, 800 Gb/sec and 1.6 Tb/sec ports.

SkyOS is described as an AI-optimized version of SONiC and Microsoft's Switch Abstraction Interface, a software base already common in hyperscaler and cloud data centres.

Upscale AI also plans to use its SkyCMD telemetry and orchestration layer across both scale-up and scale-out networks, giving operators a single view of the two fabrics.

The customer pitch is that clusters could mix CPUs, GPUs and XPUs front-ended by DPUs or NICs rather than being locked into one accelerator vendor's memory-domain design.

The main boundary remains Nvidia GPU support.

Nvidia is not supporting SkyHammer and SkyOS as an alternative to NVSwitch for scale-up, so there is no current way to use SkyHammer as the scale-up path for Nvidia GPUs.

AMD may have more reason to favor outside options around UALink, UALoE or ESUN.

For now, Upscale AI's strategy depends on using Nvidia's Ethernet scale-out silicon while proving that its own scale-up fabric can offer enough predictable latency, lossless behavior and openness to challenge the economics of proprietary accelerator domains.