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INFRASTRUCTURE CONSTRAINT:

FuriosaAI and Broadcom Target the Next Layer of AI Inference Infrastructure

Newsroom brief

FuriosaAI said it will work with Broadcom on a next-generation AI inference platform built around its TCP architecture and Broadcom networking and packaging technologies. The planned third-generation accelerator will use a 2-nanometer compute die, HBM4/HBM4E memory and multi-die packaging, with sampling planned for the first half of 2028. The deal points to AI infrastructure competition shifting from single-chip performance toward memory, networking, power efficiency and rack-level system design.

Verified against source materialEdited by SendTech Times Chips & Compute DeskSource: Aitimes
FuriosaAI and Broadcom Target the Next Layer of AI Inference Infrastructure
Image source: 인공지능신문

What happened

FuriosaAI said it has formed a strategic partnership with Broadcom to co-develop a next-generation AI inference platform.

The Korean AI chip company said the project will move its Tensor Contraction Processor architecture into a multi-die chiplet system for hyperscale AI environments where token-processing demand is rising.

The planned platform combines FuriosaAI architecture with Broadcom AI networking, high-bandwidth Ethernet switching and advanced packaging.

The source says the goal is an integrated AI computing, networking and software platform for large inference clusters, not only a standalone accelerator.

The work builds on FuriosaAI RNGD, or Renegade, accelerator.

The source describes RNGD as a 180W PCIe AI accelerator in mass production using TSMC 5-nanometer process and SK hynix HBM3, optimized for large language model and agentic AI workloads.

FuriosaAI said it has been validated in customer environments including Samsung SDS and LG AI Research.

Why it matters

The announcement points to AI infrastructure competition moving beyond single-chip performance.

If inference demand keeps expanding, buyers may place more weight on memory bandwidth, interconnect, rack-level networking and power efficiency.

That matters for Korean AI semiconductor companies because it puts system design and global infrastructure partnerships at the center of the market.

FuriosaAI is positioning its TCP architecture alongside Broadcom networking and packaging assets to address bottlenecks in large agentic AI deployments.

Who is affected

The most direct audience is hyperscale AI infrastructure buyers, cloud providers and enterprises planning larger inference workloads.

It also matters for AI chip startups trying to compete in markets shaped by GPU-based infrastructure.

For Korean technology readers, the signal is that a domestic AI semiconductor company is working with a global chip and networking supplier on a platform aimed at frontier model and agentic AI inference.

What to watch next

FuriosaAI said the third-generation accelerator will use a 2-nanometer compute die, HBM4 and HBM4E memory, and Broadcom packaging to combine multiple silicon dies into one high-performance chip.

The companies plan to begin sampling in the first half of 2028.

Readers should watch whether the partnership moves from architecture plans to working silicon, whether customer adoption follows current RNGD deployments, and whether rack-scale networking becomes a clearer differentiator in AI inference infrastructure.

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