Homebuilt GPU Uses 8,192 RISC-V MCUs Before 32,000-Chip Version
Bitluni built a working homebrew GPU cluster around 8,192 CH570 RISC-V microcontrollers, with a 32,000-MCU version planned. The project still lacks published performance results and design files.
The Register reported that a homebuilt GPU cluster based on 8,192 CH570 RISC-V microcontrollers has moved from YouTube engineering experiment to working hardware, but its creator has not yet published the performance results or design files that would show whether the approach is repeatable.
The project was built by electrical engineering and software developer YouTuber bitluni after a six-month board-design effort, according to the report.
The build used $0.13 CH570 RISC-V MCUs on custom PCBs, with another 256 larger FPU-equipped cores handling control duties.
Bitluni said in the project video that he already has parts for a later version designed around 32,000 MCUs.
Bitluni Built A GPU Cluster Around 8,192 RISC-V MCUs
The project is not a commercial accelerator and is not being presented as a graphics-card replacement.
It is a custom cluster that uses many small RISC-V microcontrollers to drive a QVGA-equivalent display at 320x200 resolution.
Bitluni described the device as his "nemesis" in a project video, according to The Register.
The build followed an earlier homemade GPU video and a subsequent partnership approach from PCB design software firm Altium.
Each CH570 chip in the first version runs at 100 MHz with 12 KB of SRAM, according to the report.
The six-layer PCB design uses 32 rows of 32 chips, although the full intended blade design was not completed in the first version.
PCB Manufacturing Forced A Split Blade Design
The build exposed a practical hardware constraint before it worked.
Bitluni's PCB manufacturer could not process the original blade request through its website because the board was too complicated, forcing him to split each blade into two pieces, according to the report.
The first test blade also produced intermittent or non-working MCUs.
The repair path required a redesign, trace relocation to reduce interference, and several weeks of waiting for replacements.
A later test-board problem came from crossed MOSI and MISO lines, which made level 0 unable to communicate with level 1.
Bitluni said in the video that he bypassed the error on sample boards and that the remaining boards were built correctly.
The Next Version Still Lacks Public Results
The working first version includes individually connected RGB LEDs tied to each programmable MCU, according to the report.
The Register described those LEDs as the QVGA equivalent of the project rather than a high-performance graphics pipeline.
The next revision remains a planned build rather than a published second version.
The project still lacks public performance results for version one, released design files, details on the 32,000-MCU board build, and additional comment from bitluni beyond the reported video and no-response note.
