Siemens Pitches Open EDA As Chip Design Agents Reach Trials

Siemens is using open electronic design automation as the selling point for Fuse, its AI agent for chip design, Techwire Asia reported after an interview with Ankur Gupta, executive vice president of EDA IC software at Siemens Digital Industries Software.

The product sits in a crowded market.

Siemens launched Fuse EDA AI Agent at Nvidia's GTC in March, while Synopsys and Cadence brought out their own autonomous design agents within weeks.

By the Design Automation Conference in July, all three major EDA vendors were presenting versions of long-running AI autonomy for chip engineers.

Gupta framed the difference around tool choice rather than raw automation claims.

Fuse is built for chipmakers that combine timing, place-and-route, physical verification, test and other tools from different vendors.

The agent is meant to orchestrate across those flows when tools expose application programming interfaces or Model Context Protocol servers.

That positioning also reflects Siemens' competitive position.

Gupta acknowledged that Siemens does not have the same dominant end-to-end EDA platform as Synopsys or Cadence, and argued that the gap pushes Siemens towards openness.

Synopsys is building agentic design around the broader stack it gained through Ansys, while Cadence is assembling agents across its integrated flow.

Customer evidence remains early but more concrete than a launch-only claim.

Gupta put Fuse installations at more than 20 customers.

Setting up the system with a customer's on-premise compute, GPUs, CPUs and scheduling can take one to two quarters, and single-digit customers have moved from installation into live design use.

Those figures keep the story at a deployment-trial stage.

Installations show that customers are testing the framework inside their own infrastructure, but the smaller live-design number indicates that production use still depends on integration work, internal approval and confidence in how the agent handles long-running chip tasks.

The automation still requires human control.

Gupta described AI copilots as useful for exploration, but said autonomous execution cannot be limited to letting a system "go figure it out" for tasks that can run for days or weeks.

Designers need checkpoints, logs and decision points so they can intervene before an agent burns compute or runs down the wrong design path.

The most immediate change is in design-space exploration.

A chip team can ask an agent to optimise for power, performance and area, then leave the system to test approaches and return candidate trade-offs.

Techwire Asia described that workflow as a possible shift from sequential engineering work towards parallel exploration supervised by human designers.

That workflow is also where the multi-vendor argument becomes operational rather than promotional.

If a design team already uses a mixed stack, Fuse must coordinate software from several suppliers without forcing a wholesale platform migration.

The open claim therefore rests on whether third-party tool access, MCP servers and internal compute policies can be made reliable enough for real design programmes.

Siemens also linked Fuse to the wider agent stack in its industrial software portfolio.

The same event included conversation around Teamcenter, lifecycle-management systems and manufacturing tools, making Fuse part of a broader attempt to connect chip design decisions with production and product data rather than treating EDA as a separate silo.

The open-framework claim will now depend on adoption proof.

Techwire Asia did not identify the more than 20 customers, name the single-digit live-design users, disclose benchmark results against Synopsys or Cadence agents, or provide customer-confirmed data on design-cycle savings.