Claros Turns Samsung Foundry Into a Test for Its AI Power Chip

Samsung gives Claros a manufacturing path

Claros says it is working with Samsung Electronics to scale production of its integrated voltage regulator, a power chip for AI data centers.

The company says the IVR will be manufactured at Samsung’s fab in Austin, Texas, giving Claros a U.S. foundry route as it tries to move from design to customer delivery.

The product target is specific: power conversion close to the processor.

Claros argues that older data-center power architectures waste electricity before it reaches compute silicon, while its IVR moves the conversion point much closer to the chip.

The company says that shift cuts the distance electricity travels from inches to millimeters.

The 800 VDC claim depends on the final step near the chip

Claros ties the Samsung collaboration to 800 VDC data-center architecture.

The company argues that higher-voltage distribution can improve rack-level efficiency, but the gain is incomplete if voltage regulation still happens too far from the point of demand.

In Claros’s view, the IVR is meant to complete that power chain by converting electricity millimeters from the processor.

The strongest number in the disclosure is the company’s claim that Claros IVRs can cut energy loss by up to 30%.

That is a product claim, not a disclosed customer result.

The source does not name a buyer, installation site, qualification milestone, shipment volume, or measured deployment outcome.

For now, the disclosed progress is manufacturing access and an expected sample path, not broad data-center adoption.

U.S. foundry capacity is the hard constraint

The manufacturing detail is important because Claros is not only selling a circuit design.

It needs production capacity in a semiconductor market where foundry slots are scarce and lead times are long.

The company says IVR samples from Samsung fabs will start shipping this year, with full manufacturing in sight.

That does not settle the commercial test.

Samples still have to reach prospective customers, survive qualification, fit server and accelerator designs, and prove that energy savings near the processor can justify the integration work.

The source supports a manufacturing milestone; it does not prove customer demand, cost advantage, thermal performance under deployment load, or data-center-wide energy reduction.

Claros also links the power argument to heat and cooling.

Its stated logic is simple: less waste at the chip should mean less heat, less cooling, lower power draw, and less strain on the grid.

Those are plausible operating targets for dense AI rooms, but the disclosure stops short of measured customer evidence.

The Samsung arrangement gets Claros closer to hardware that can be tested in the field; it does not by itself validate the full data-center energy story.

The proof moves from fab access to qualification

Claros is trying to solve a real AI infrastructure bottleneck: more compute means more power conversion, more heat, and more pressure on data-center electrical design.

A chip-level IVR can be attractive if it reduces loss before electricity reaches processors, but the operating evidence will come after samples leave the fab.

The key evidence is concrete: whether Samsung-built IVR samples reach customers this year, whether those customers qualify the parts for AI systems, and whether Claros can show measured power-loss reduction without creating new integration or reliability problems inside dense data-center hardware.